MAX485 RS-485 Guide: Pinout, Termination and Biasing

MAX485 RS-485 guide with a two-wire bus, two end terminations and checks for pinout, idle bias and direction control

MAX485 RS-485 Guide: Pinout, Termination and Biasing

A half-duplex RS-485 link can pass a short bench test and still fail when the last node is connected, every transmitter goes quiet, or a replacement module changes the resistor network. Choosing the transceiver is only one part of qualifying the bus.

This guide uses the original Analog Devices/Maxim MAX485 as its reference. It separates chip specifications from module features, explains where termination and idle bias belong, and shows why a nominally reasonable resistor value can miss the receiver threshold at a supply-and-tolerance corner.

1. Identify the chip before choosing the module

The manufacturer's MAX1487–MAX491 family datasheet covers several related parts with different speeds, slew rates and loading. A feature listed on the front page for one family member is not automatically a MAX485 feature. In particular, MAX485 is not slew-rate limited and does not have the low-current shutdown mode offered by some other members.

A board sold as a MAX485 module may add terminal blocks, LEDs, bias resistors, termination, protection or automatic direction circuitry. Those are board-level choices. Obtain the schematic and identify the fitted manufacturer before treating a generic board description as an electrical specification.

Reference MAX485 characteristic What the specification means What still needs checking
4.75–5.25 V supply Operation from a nominal 5 V rail Rail tolerance, local bypassing and startup
Up to 2.5 Mbps Device data-rate capability under specified conditions Cable length, edge quality, topology and loading
−7 to +12 V receiver common-mode range Specified receiver operation within the stated range Ground offset, individual pin limits and transients
One unit load per receiver A conventional 32-unit-load network budget Bias-network loading and every attached receiver
Open-input failsafe Receiver high with inputs open Idle terminated bus and shorted-input behavior

Use Chip-seek's MAX485 interface IC listings to locate ordering codes, then qualify the exact part against its own datasheet. RS-485 describes the electrical interface; addressing, packet checks, retries and bus ownership belong to the protocol and firmware. An RS-232 transceiver is a different device, as explained in the MAX3232 RS-232 replacement guide.

2. MAX485 pinout: separate the logic and bus sides

For the reference DIP/SO pinout, the microcontroller connects to RO, DI, DE and the active-low receiver enable, shown here as /RE. The cable connects to A and B. Check the top-view orientation before routing a PCB or probing a board; a bottom view reverses the apparent pin positions.

MAX485 DIP and SO top-view pinout: RO 1, active-low RE 2, DE 3, DI 4, GND 5, A 6, B 7 and VCC 8
Figure 1. Original DIP/SO pin diagram, checked against the manufacturer's pin-description table and Figure 1. /RE means active low. This drawing does not apply to the differently assigned µMAX package.
DIP/SO pin Signal Connection and function
1 RO Receiver output to the MCU receive input
2 /RE Low enables RO; high makes RO high impedance
3 DE High enables the bus driver; low releases A and B
4 DI Driver input from the MCU transmit output
5 GND Local circuit reference
6 A Noninverting bus connection for this device
7 B Inverting bus connection for this device
8 VCC Nominal 5 V supply

With DE high, a high DI makes A more positive than B on this device. With the receiver enabled, A−B at or above +200 mV produces a high RO; at or below −200 mV it produces a low RO. Do not infer this polarity from another vendor's A/B terminal lettering alone: compare both function tables and the equipment's wiring convention.

Tying DE and /RE to one direction signal is convenient: low selects receive, while high selects transmit and disables the local receiver. Keeping the controls separate permits reception during transmission, but an echo is not a complete collision-detection or arbitration system. When DE is low and /RE is high, both interfaces are disabled; that condition does not give MAX485 the family's low-current shutdown specification.

3. Check 3.3 V logic and common mode independently

A 3.3 V microcontroller may drive MAX485's DI, DE and /RE if its guaranteed output levels satisfy the receiver of those logic signals. The reference part specifies a 2.0 V minimum logic-high input and a 0.8 V maximum logic-low input. Compare guaranteed limits over temperature and loading, rather than the nominal rail names.

The return path needs a separate check. A MAX485 powered from 5 V does not guarantee an RO voltage safe for every 3.3 V MCU input. Its 3.5 V minimum high-output specification at the stated load is a lower bound, not a clamp voltage. Verify the MCU pin's input rating and 5 V tolerance, add suitable translation, or select a transceiver designed for the required supply and logic interface.

On the cable side, define VAB = VA − VB and common mode as VCM = (VA + VB) / 2, measured relative to the receiving node's ground. Differential signaling tolerates a range of shared offsets; it does not make arbitrary ground differences harmless. Check both the specified common-mode operating conditions and each pin's absolute maximum limits.

4. Put termination at the physical ends of the trunk

Use a trunk with short node connections rather than a star of long branches. Where transmission-line termination is needed, match the terminating resistance to the cable's characteristic impedance and place it at the two physical ends. The first and last protocol addresses are irrelevant to their physical location.

The TI RS-485 Design Guide explains topology, termination and stub constraints. A 120-ohm example is common, but the cable specification and the measured installation determine the choice. Baud rate alone cannot decide whether a cable is electrically short: the driver's transition time also matters, especially with a part that is not slew-rate limited.

RS-485 trunk with A and B conductors, a 120-ohm termination across the pair at each physical end, and two short interior node stubs without termination
Figure 2. Original conceptual trunk drawing using 120-ohm cable termination as an example. Interior nodes have short stubs and no end termination. Reference conductors, bias and protection are omitted here to isolate the topology question.

Two 120-ohm end resistors present a 60-ohm parallel DC load before receiver and bias loading. Eight boards with a 120-ohm resistor enabled on every board present only 15 ohms. The second arrangement is not an improvement in noise immunity; it substantially increases the driver's load.

For a retrofit, inspect every termination jumper and fixed resistor. With equipment safely de-energized and the circuit understood, a resistance measurement across the pair can help reveal unexpected parallel loads. Connected protection and bias networks may affect the reading, so use it as a diagnostic observation rather than proof of the cable's high-frequency impedance.

Then check waveforms at the end nodes and the longest stub using a measurement method suitable for the common-mode voltage. Look for ringing, threshold crossings and settling before the receiver's sampling instant. Replacing the IC cannot correct a long star branch or excessive distributed termination.

5. Open-input failsafe is not idle-bus failsafe

When all transmitters release a terminated bus, the end resistors tend to pull the differential voltage toward zero. That is different from leaving the receiver inputs open. Analog Devices explicitly distinguishes these conditions for MAX485: its open-input guarantee does not cover a shorted input or an idle bus with termination connected.

An external pull-up on A and pull-down on B can establish a positive idle differential for this pin convention. Install a deliberately designed bias network at a designated location. Adding an uncontrolled pair on every module changes the equivalent resistance, current consumption and behavior when nodes lose power.

Simplified DC bias circuit with a resistor from 5 V to A, two 120-ohm terminations in parallel between A and B, and a matching resistor from B to ground
Figure 3. Original lumped DC equivalent for the calculation below. The two end terminations are drawn together as parallel branches; this is not their physical placement. Receiver loading, leakage and cable resistance are omitted, so this is not a complete production resistor selection.

A calculation that exposes the tolerance problem

For equal bias resistors Rb and two 120-ohm terminations, the simplified load is Rt = 120 || 120 = 60 ohms. Ignoring receiver loading and cable resistance gives VAB = VCC × Rt / (2 × Rb + Rt). This is a calculated DC model, not a bench measurement.

At 5.00 V, two 680-ohm bias resistors produce about 211 mV. That is only about 11 mV above the +200 mV high-state boundary. Now use a 4.75 V rail, both bias resistors at +1% and both termination resistors at −1%: Rb becomes 686.8 ohms, Rt becomes 59.4 ohms, and the differential drops to approximately 197 mV. The simplified circuit already misses the guaranteed high-state boundary.

Calculated idle differential: 470-ohm nominal bias gives 300 mV, 680-ohm nominal gives 211 mV, 680-ohm at the stated tolerance corner gives 197 mV, and 1-kilohm nominal gives 146 mV, compared with a 200 mV minimum
Figure 4. Calculated values rounded to the nearest millivolt. Nominal cases use 5.00 V and 60 ohms. The 680* corner uses 4.75 V, 686.8-ohm bias resistors and 59.4-ohm termination equivalent. Red means below +200 mV; green only clears that threshold in this simplified model and does not establish a qualified noise margin.

The 470-ohm example produces 300 mV nominally, but it is not a universal resistor recommendation. Lower bias resistance increases loading, and a full bus can invalidate the unloaded calculation. Include receiver input currents across common mode, resistor tolerances, cable resistance, protection leakage, unpowered nodes and the required noise margin in the final model.

TI's guide provides a more complete loading treatment and a worked external-bias example. Use that method with the actual transceiver population rather than copying a resistor pair from an unrelated module. Typical receiver hysteresis is also not a substitute for guaranteed idle differential margin.

6. Release the driver after the last stop bit

On a half-duplex bus, only the intended transmitter should enable its driver. Firmware must assert DE early enough for the first start bit and release it after the last stop bit has left the UART, while respecting the protocol's turnaround rules. A transmit-buffer-empty or DMA-complete event may occur before the final bit reaches the wire.

For an 8N1 UART frame, one byte occupies ten bit periods. At 115,200 bit/s, that is approximately 86.8 microseconds per byte; eight continuously transmitted bytes take about 694.4 microseconds. These are serialization times, not a universal additional delay to insert after every packet.

  1. Set the desired receiver state, establish DI's idle level and assert DE with the necessary device timing margin.
  2. Transmit the complete frame and wait for the UART condition that confirms the final stop bit is complete.
  3. Release DE, account for driver-disable and propagation timing, and enable reception if it was disabled.
  4. Allow the peer to respond according to the protocol's ownership and silence requirements.

Check the exact MCU reference manual for the completion flag's meaning. During validation, capture DE, DI, RO and the bus together so the final stop bit and driver release can be compared. Repeat at the shortest permitted inter-frame interval and under interrupt or DMA load.

7. Qualify a replacement by behavior and package

A matching eight-pin outline does not establish a replacement. First compare supply, logic thresholds, polarity, pin assignment and data rate. Then compare receiver failsafe conditions, unit loading, enable timing, temperature grade and the protection ratings required by the installation.

Part or change Relevant difference Qualification consequence
MAX485 reference 2.5 Mbps, one unit load, not slew-rate limited Baseline; qualify cable, bias and actual loading
MAX487 in the same family 250 kbps, slew-rate limited, one-quarter unit load Lower speed limit; reassess timing and edge behavior
MAX1487 in the same family 2.5 Mbps, one-quarter unit load Loading differs; verify the exact package and full specification
A 3.3 V transceiver Different supply and potentially different logic/failsafe limits Review the entire interface, not just the footprint
A module with automatic direction Board circuitry controls driver ownership Verify first-bit, last-bit and turnaround behavior

The unit-load figures above describe electrical loading, not a promise that any cable can support that many devices. Bias consumes part of the loading budget, and topology, protection capacitance and protocol behavior introduce additional constraints. Keep the device-count calculation separate from a network performance claim.

Read suffixes carefully. MAX485ESA and MAX485EESA belong to different base-part naming patterns; the extra E is not simply a cosmetic spelling change. Do not import an ESD claim from a similarly named family into the original MAX485 specification. Attach the exact manufacturer's datasheet and ordering code to the approved BOM.

Annotated Analog Devices eight-lead SOIC catalogue rendering with four leads per side and reminders to verify the ordering code and mechanical land pattern
Figure 5. Annotated package rendering from Chip-seek's MAX485ESA+T catalogue record. It is a package illustration, not a photograph of available stock or a specific lot. Use the manufacturer's mechanical drawing for dimensions and pad design; use the separate pin diagram for electrical orientation.

What to request with a quotation

  • Identity: complete manufacturer part number, package suffix, temperature grade and permitted alternates.
  • Assembly fit: package drawing, body dimensions, lead pitch, land pattern and packing format.
  • Traceability: actual lot and label photographs where available, date/lot information and supporting supply-chain documents.
  • Validation samples covering the intended supply, temperature, node count and protection network before approving a substitution.
  • Confirmed quantity and delivery terms for the quoted lot; a catalogue image does not establish stock, origin or electrical authenticity.

Visual inspection can reveal inconsistent markings or packaging, but it cannot establish electrical authenticity by itself. Keep the approved supplier, inspection criteria and functional test results with the purchase record. If a module is being replaced, also record the resistor and protection population that the IC-level BOM leaves out.

8. A practical bus acceptance checklist

Test the complete installation, not only two boards on a short cable. Write down the expected idle polarity, termination locations, bias location, maximum ground offset, cable type and permitted node population before running the checks. That makes a replacement decision repeatable.

  • Confirm supply tolerance and MCU logic compatibility at both signal directions.
  • Verify physical-end termination and remove unintended interior terminations.
  • Measure idle differential with all drivers disabled, including relevant powered-off-node combinations.
  • Check common-mode conditions and waveforms at the farthest and most heavily loaded nodes.
  • Observe first-bit transmission, final-stop-bit completion and the earliest allowed peer response.
  • Repeat with the proposed alternate; retain captures, resistor values and the exact tested ordering code.

Classify failures before changing parts. An unstable idle RO suggests a different investigation from a clipped last byte, while ground-related failures require more than swapping A and B. A documented baseline helps purchasing distinguish a qualified substitute from a part that merely works in one demonstration.

9. MAX485 FAQ

Can MAX485 run directly from a 3.3 V supply?

Not within the reference part's specified operating supply range. It requires 4.75–5.25 V. A 3.3 V MCU may still interface through a properly checked logic connection, but that does not make a 3.3 V supply valid for the transceiver itself.

Does every MAX485 board need a 120-ohm resistor?

No. Termination belongs at the physical ends when the cable and edge-rate conditions require it. Interior nodes generally do not receive another parallel termination, and the resistor value should match the cable rather than a universal module convention.

Are 680-ohm bias resistors always sufficient?

No. With two 120-ohm terminations, the simplified nominal result is only about 211 mV at 5 V. The stated 4.75 V and 1% resistor corner falls to about 197 mV before additional loading, so a complete worst-case calculation is necessary.

Does MAX485 guarantee a high receiver output whenever nobody transmits?

No. Its documented open-input failsafe is not an idle-terminated-bus guarantee. Design sufficient external differential bias or select a transceiver with explicitly specified behavior for the required idle and fault conditions.

Can MAX487 replace MAX485 without firmware changes?

Only after qualification; it is not a blanket speed-compatible replacement. MAX487's 250 kbps maximum differs from MAX485's 2.5 Mbps rating, and its slew limiting and loading also differ. Check the application's actual rate and timing before approving it.

Should DE go low as soon as the UART data register is empty?

Not unless that event also guarantees completion of the final stop bit on the selected MCU. Use the documented transmission-complete condition and account for transceiver and protocol timing. Disabling the driver early can truncate the last byte.

10. Primary technical references

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