EEPROM vs Flash: Endurance, Granularity, Write Time

EEPROM vs Flash: Endurance, Granularity, Write Time

EEPROM vs Flash: Endurance, Granularity, and Write Time

Both store data without power. The difference is how often you can write, how much you must erase at once, and how long the write takes — and those three decide which one belongs in your design.

Quick Answer

  • EEPROM: byte-writable, 1M+ cycles, milliseconds per byte, small density. Config and calibration.
  • NOR flash: sector erase (4 KB), ~100k cycles, sub-millisecond page writes. Firmware and moderate logging.
  • NAND flash: block erase (large), lower endurance, needs ECC and bad-block handling. Bulk data.
  • FRAM / MRAM: effectively unlimited writes, fast, expensive. High-frequency counters and logs.

1. The three axes

Write endurance versus density for EEPROM, NOR, SLC NAND and NAND
Figure 1 — Density and endurance pull in opposite directions; check the exact part, not the class average.
Type Endurance Erase unit Write time
EEPROM 1M–4M cycles Byte/page ≈ 5 ms per write
NOR flash ≈ 100k cycles 4 KB sector Page < 1 ms, erase 50–400 ms
NAND flash 1k–3k (MLC/TLC) 128 KB block Page ≈ 0.3 ms, block ≈ 2 ms
FRAM / MRAM 10^12+ Byte Microseconds

2. Erase granularity is the structural difference

Erase granularity for EEPROM, NOR sector and NAND block
Figure 2 — Updating one byte in flash means read-modify-write of the whole sector or block.

Flash cannot overwrite a byte in place: it erases a whole sector, then rewrites it. That means a small update becomes a read-modify-write cycle, and the effective endurance of that byte is divided by the number of bytes in the sector. EEPROM avoids this at the cost of density and price.

NOR and NAND differ in how they handle that. NOR exposes a random-access interface and allows execute-in-place, which is why firmware lives there. NAND is organised in pages and blocks, needs ECC, and manages bad blocks — cheaper per bit, but the controller has to do more work.

3. Endurance math

Years to one million write cycles at different write intervals
Figure 3 — One million cycles is 11.6 days at one write per second, and 19 years at one per ten minutes.
1M cycles at 1 write/s   = 11.6 days
1M cycles at 1 write/min = 1.9 years
1M cycles at 1 write/10min = 19 years
100k cycles (NOR) at 1 write/min = 69 days

That is the calculation that decides the part. A counter updated once per second needs FRAM or wear leveling; a configuration block written on change is fine in EEPROM; firmware written at production is fine in NOR.

Write pattern Effective life Fix
1 byte/s into EEPROM 11.6 days at 1M FRAM, or buffer + periodic write
1 write/min into NOR 69 days at 100k Wear leveling across sectors
Config on change Decades No action
Firmware at production Effectively unlimited Sector erase is fine
Write times for EEPROM byte, NOR page, NOR sector erase and NAND block erase
Figure 4 — The erase dominates the time budget, not the page write.

Write time matters for power-loss behaviour: a 300 ms sector erase that is interrupted can leave the sector invalid. Plan for a journal or a second sector, not for "it will finish".

4. Choosing by workload

Memory selection by workload pattern
Figure 5 — Four patterns; most products use two of them.
Workload Best fit Why
Config, calibration, serial number EEPROM Byte writes, high endurance
Firmware, bootloader NOR flash Execute-in-place, sector update
Counter, event log, energy meter FRAM / MRAM Unlimited writes, no erase
Audio, images, bulk records NAND Density per dollar, with ECC

For the serial-flash side of a design, the W25Q32 layout guide covers the interface and decoupling; for the endurance side of an EOL decision, the PCN/EOL guide covers last-time buys.

4b. Interface and package

Interface Typical use
I2C EEPROM Small config, 2-wire bus, many devices
SPI EEPROM Faster byte writes, small density
SPI/QSPI NOR Firmware, execute-in-place, larger density
Parallel NOR Legacy, fast random access, many pins
NAND (raw or managed) Bulk storage; managed parts hide ECC/bad blocks

5. Checklist

  1. Estimate writes per day and the product lifetime in years.
  2. Divide the endurance by the sector size if the update is smaller than the erase unit.
  3. Check the write and erase time against the power-loss strategy.
  4. Confirm the interface (I2C, SPI, QSPI, parallel) and the pin count.
  5. For NAND, budget for ECC and bad-block management.
  6. Check data retention at the maximum operating temperature.

6. FAQ

Can I use flash like EEPROM?

Only with wear leveling and a read-modify-write scheme. Writing a byte to flash without erasing the sector is not possible.

How many writes can an EEPROM really take?

1M–4M cycles is typical, but endurance is specified per byte and at a temperature. Check the datasheet conditions.

Why does my flash wear out so fast?

Because each small update rewrites a whole sector. Effective endurance is the rated cycles divided by the number of bytes sharing that sector.

Is FRAM worth the cost?

When the write rate is high or power can be lost at any moment, yes. It removes the erase cycle and the wear question entirely.

Do I need ECC on NOR?

Usually not for firmware; for long-life logging at high temperature, a light ECC or checksum is cheap insurance.

What happens if power fails during a write?

An EEPROM byte write is atomic enough for most designs; a flash sector erase is not. Use a journal or two alternating sectors if the data must survive an unexpected power loss.

Can I store data for 20 years?

Retention is specified typically at 10–20 years at 85 °C. At higher temperatures, derate and verify with the vendor.

7. Sources

  • Memory datasheets — endurance, retention, page/sector/block size, write and erase times.
  • Application notes on wear leveling and power-loss-safe logging (vendor and MCU documentation).
  • JEDEC standards for memory qualification and retention testing.

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