AMS1117 Thermal Budget: Junction Temperature at 5 V and 12 V

AMS1117 Thermal Budget: Junction Temperature at 5 V and 12 V

AMS1117 Thermal Budget: Junction Temperature at 5 V and 12 V

The part is rated for 1 A. On a typical board at 12 V input, the thermal limit arrives at about 0.19 A — and at 60 °C ambient, near 0.12 A.

Quick Answer

An AMS1117-3.3 in SOT-223 can deliver 1 A only when the voltage difference is small. Thermal limits, not current limits, set the real ceiling:

  • 12 V → 3.3 V: about 0.19 A at 25 °C ambient, 0.12 A at 60 °C (61.6 °C/W board)
  • 5 V → 3.3 V: about 0.94 A at 25 °C, 0.62 A at 60 °C
  • Anything above ~5 V input at more than 0.3 A should be a buck converter, not a linear regulator

1. Three numbers decide everything

Every thermal question about a linear regulator comes back to three inputs: input voltage, output current, and the junction-to-ambient thermal resistance of the board you actually built. Nothing else matters until those three are known.

Package dissipation is the voltage difference multiplied by the load current, plus the small quiescent term:

P = (Vin - Vout) x Iout + Vin x Iq
  = (Vin - 3.3) x Iout + Vin x 0.005

Junction temperature follows directly:

Tj = Ta + P x theta_JA

Two constants come from the datasheets. The AMS1117-3.3 is specified for a maximum junction temperature of 125 °C and a maximum package dissipation of 1.2 W in SOT-223 without added copper. The LM1117 family data sheet gives theta_JA = 61.6 °C/W for SOT-223 on a JEDEC high-K board, and roughly 104 °C/W with minimal copper.

Note that 1.2 W and 61.6 °C/W are consistent only if ambient is near 50 °C. At 25 °C, the same board could dissipate 1.62 W before reaching 125 °C. The 1.2 W figure is a conservative marketing number, not a physical constant.

2. Why 1 A on the label is not 1 A on the board

The 1 A rating is a current-limit specification. It says the silicon will not be damaged by 1 A flowing through it at that instant. It says nothing about how long the part survives while dissipating the resulting heat.

At 5 V input the difference is 1.7 V, so 1 A produces 1.7 W plus 25 mW of quiescent loss. At 61.6 °C/W that is a 106 °C rise — 131 °C junction at 25 °C ambient, already over the limit. At 12 V input the same 1 A produces 8.7 W, which would require a heatsink, not a copper pour.

Dropout margin is a separate limit

Thermal budget is only half the story. The AMS1117 is specified with about 1.3 V dropout at 1 A, so a 3.3 V output needs at least 4.6 V at the input pin under load. A 5 V rail looks like it has 1.7 V of margin, but that margin is consumed by three things:

  • The regulator's own dropout (up to 1.3 V at full current)
  • Ripple on the 5 V rail, typically 100–300 mV under transient load
  • Cable and connector drop between the supply and the board

At 0.3 A the dropout requirement falls, and 5 V input is comfortable. At 1 A with a 300 mV ripple, the effective input can dip to 4.6 V and regulation starts to fail — which shows up as output sag on current peaks, not as constant overheating. Two different failure modes, often confused.

AMS1117 package dissipation versus input voltage at 0.1, 0.3, 0.5 and 1 A
Figure 1 — Dissipation grows linearly with input voltage. The 1.2 W line is the SOT-223 limit without extra copper.

3. Worked example: 12 V to 3.3 V

Take a 12 V rail feeding an ESP32 class board at 0.5 A. That is a reasonable load for a Wi-Fi device with a display.

P = (12 - 3.3) x 0.5 + 12 x 0.005
  = 4.35 + 0.06
  = 4.41 W

dT = 4.41 x 61.6 = 272 K
Tj = 25 + 272 = 297 C

297 °C is far beyond the 125 °C limit — the part enters thermal shutdown long before that, then cools, restarts, and repeats. The observed behaviour is a supply that works for a few seconds and then collapses under load.

Invert the equation to get the actual ceiling:

Imax = [ (Tjmax - Ta) / theta_JA - Vin x Iq ] / (Vin - Vout)

Ta = 25 C:  [ (125-25)/61.6 - 0.06 ] / 8.7 = 0.186 A
Ta = 60 C:  [ (125-60)/61.6 - 0.06 ] / 8.7 = 0.120 A

The result is not a rounding error. Even the optimistic 61.6 °C/W board gives 19 % of the rated current. A minimal-copper board gives about 11 %.

Junction temperature versus output current at 12 V input for two thermal resistances
Figure 2 — At 12 V, the 125 °C limit is crossed at 0.19 A on a JEDEC board and 0.11 A on minimal copper.

4. Worked example: 5 V to 3.3 V

Drop the input to 5 V and the picture changes completely, because the voltage across the pass element falls from 8.7 V to 1.7 V.

Iout = 0.5 A:  P = 1.7 x 0.5 + 0.025 = 0.88 W
              dT = 54 K   -> Tj = 79 C at 25 C, 114 C at 60 C

Iout = 1.0 A:  P = 1.7 x 1.0 + 0.025 = 1.73 W
              dT = 106 K  -> Tj = 131 C at 25 C (fails)

So the same package that is unusable from 12 V is perfectly reasonable from 5 V at half an amp, and marginal at 1 A in a 25 °C lab. Put that board in an enclosure at 60 °C and the 1 A case fails while the 0.5 A case still has 11 °C of margin.

Junction temperature versus load current at 5 V input for ambient temperatures of 25, 50 and 70 degrees
Figure 3 — At 5 V the part is usable, but ambient temperature moves the ceiling more than most designers expect.

5. Copper area is a thermal component

The single largest variable you control is not the capacitor value or the load — it is the copper attached to the tab. The SOT-223 tab is the thermal path: die → lead frame → tab → copper → air.

Board condition theta_JA Pd at 125 °C / 25 °C Max at 12 V in
JEDEC high-K, 2s2p, large pour 61.6 °C/W 1.62 W 0.19 A
Typical 4-layer, 1 in² pour, vias ≈ 75 °C/W (est.) 1.33 W 0.15 A
2-layer, pad only ≈ 104 °C/W 0.96 W 0.11 A

The middle row is an estimate, not a datasheet value: interpolating between the two published conditions is reasonable for planning, but the only number that counts is the one you measure on your own board.

Practical points: put the tab on a copper pour with at least nine thermal vias under it, connect the pour to an internal ground plane, and avoid slotting the copper with silkscreen or traces. A 1 in² pour on 1 oz copper is roughly the point of diminishing returns for this package.

Vias, planes and the 1 in² rule

The tab is roughly 3.5 mm × 2 mm, so the copper immediately under it is tiny. What matters is how quickly heat leaves that area. A 1 in² pour on the component side spreads heat laterally; a grid of vias (0.3 mm drill, 1 mm pitch) transfers it to an inner plane, which then spreads it over the whole board.

Two failure patterns are common. First, a pour that looks large but is isolated — a single-layer pad with no vias behaves like the 104 °C/W case no matter how wide it looks. Second, a pour that is thermally but not electrically connected, leaving the tab floating relative to the plane.

A practical target: tab copper of at least 100 mm² on the top layer, nine to sixteen vias, and connection to a plane of at least 500 mm². Below that, assume the worst-case thermal resistance and derate accordingly.

6. Derating curves and the safe operating area

Two charts replace a page of text. The first gives maximum continuous current versus ambient for a fixed board. The second combines both axes: input voltage and load current, with separate curves for 25, 50 and 70 °C ambient.

Maximum continuous current versus ambient temperature for 12 V and 5 V inputs
Figure 4 — Derating at 61.6 °C/W. At 60 °C ambient the 12 V case allows almost nothing.
Safe operating map of output current versus input voltage for three ambient temperatures
Figure 5 — Anything below the curve is inside the junction limit. Add margin: design to 100 °C, not 125 °C.

A working rule: design to a 100 °C junction, not 125 °C. The last 25 degrees are for measurement error, enclosure hot spots and summer afternoons. Applying that rule cuts the 12 V limit from 0.19 A to about 0.13 A.

7. What actually fails in the field

Thermal failures of this part follow a recognisable pattern, and two public cases describe it well.

Case 1: destroying the regulator well below its rated current

A designer built a 12 V, 3.5 A home-automation supply feeding an ESP module and other loads through an AMS1117-3.3, and the regulator failed repeatedly at roughly a third of its rated current (source). The load was well inside 1 A. The failure was not a fake part and not the capacitor — it was the 8.7 V drop across the pass element with almost no copper.

What to check when you see this: measure the actual current, measure the tab temperature after 10 minutes, and compute dissipation. If P × 61.6 already exceeds 100 K, the layout is the problem, not the silicon.

Case 2: output sags as the board warms

A second case used 12 V input with a 47 µF output capacitor and a small soldered heatsink; the output fell noticeably under load (source). Output sag that appears only after warm-up is usually thermal shutdown cycling or a marginal dropout, not a regulation problem.

Boundary condition: these are reported cases, not measurements we performed. Clone parts also vary — some have higher dropout and different thermal behaviour — so verify the actual part number and date code before blaming the design.

Case 3: two boards, same schematic, different behaviour

The most common report is not a single failure but an inconsistency: one batch of boards runs cool, another browns out. The schematic is identical, so the difference is usually one of four things — copper area on the tab, the actual regulator vendor, the input capacitor's ESR, or the enclosure.

AMS1117-3.3 is made by several suppliers under different part numbers, including low-cost alternatives sold as generic AMS1117-5.0. Dropout and quiescent current are not identical across vendors. If two builds behave differently, measure tab temperature and dropout on both before changing the design.

8. LDO, buck, or two-stage

The decision is not "which regulator is better". It is "which one matches the voltage difference and the current".

Approach Fits when Fails when Cost of choosing it
AMS1117-3.3 from 5 V ≤0.5 A, quiet analog rail, tiny BOM Enclosure above 60 °C; >0.7 A continuous 1.7 W of heat at 1 A; 66 % efficiency
AMS1117-3.3 from 12 V ≤0.1 A housekeeping loads only Any real load; any sealed enclosure 27.5 % efficiency; thermal cycling
Buck converter (LM2596 class) 12 V in, >0.3 A, efficiency matters Sub-mV noise rails; extremely tight EMI budgets Inductor, layout care, switching noise
Two-stage: 12→5 buck, 5→3.3 LDO Need low noise and high input voltage Cost or board area is the binding constraint Extra part, extra area, best noise/heat balance
Efficiency of a 3.3 V LDO versus input voltage compared with a buck converter
Figure 6 — LDO efficiency is Vout/Vin; at 12 V input, 72 % of the energy becomes heat.

Who should not use the AMS1117 at all: any design with a 12 V or 24 V input and a load above about 100 mA; any sealed enclosure without airflow; any product that must run at 70 °C ambient; and any battery-powered device where 27 % efficiency is unacceptable.

Redesign walkthrough: 12 V to 3.3 V at 0.5 A

Start from the failing case: 12 V in, 3.3 V out, 0.5 A, 4.41 W in the regulator. Three ways to fix it, with the loss each one actually produces.

Option Calculation Heat in the box
Keep AMS1117 only (12 − 3.3) × 0.5 + 0.06 4.41 W
Buck 12→3.3, 88 % 1.65 W / 0.88 − 1.65 0.23 W
Buck 12→5 (90 %) + AMS1117 5→3.3 0.18 W in buck + 0.88 W in LDO 1.06 W

The two-stage option exists for noise, not efficiency. If the 3.3 V rail feeds an ADC or an analog front end, the LDO cleans up the switching ripple. If it only feeds digital logic, go straight to a single buck and skip the second stage.

The one-line rule: when (Vin − Vout) × Iout exceeds about 1 W, a linear regulator is the wrong part regardless of what the datasheet label says.

9. Verify on the bench instead of trusting the label

What "good" looks like

A correct design shows a tab temperature that stops rising within 15–20 minutes and stays 20–30 °C below the junction limit under worst-case ambient. If the tab temperature keeps climbing after 20 minutes, the copper is too small or the load is too high — waiting longer will not fix it.

Five measurements settle the question for a specific board.

  1. Measure Vin and Vout at full load with a meter, not the setpoint on the supply.
  2. Measure input current and compute dissipation; do not infer it from the load alone.
  3. Attach a thermocouple to the tab (not the plastic body) and log for 20–30 minutes.
  4. Compute the effective theta_JA = (Ttab − Ta) / P after stabilisation.
  5. Repeat at the maximum ambient the product will see in service, not in the lab.
Check Pass If it fails
Dissipation at max load P × 61.6 < 75 K (Tj ≤ 100 °C) Reduce current or move to a buck
Tab temperature, 30 min soak Stable, no cycling Add copper and vias; check airflow
Output at max ambient Within ±2 % of nominal Dropout margin too small; raise Vin or change part
Input/output capacitors 10 µF+ ceramic, close to pins Oscillation or sag under load
Part identity Marking and date code match supplier Re-test; clones differ in dropout and theta_JA

10. Using this in a design review

Three questions catch almost every problem, and they take five minutes with a schematic and a calculator.

  1. What is (Vin − Vout) × Iout at maximum load? If it is above 1 W, the layout needs more copper than you think, or the part is wrong.
  2. What is the worst-case ambient inside the enclosure? Add 15–20 °C to room temperature for a closed plastic box, and use that number in Tj = Ta + P × theta_JA.
  3. Is the tab copper really connected? Check that the pour is continuous, has vias, and is not broken by silkscreen or a trace crossing under the part.

If those three answers fit within 100 °C junction, the design is fine. If not, no capacitor value will save it. For related thermal problems in charging circuits, the same arithmetic applies to TP4056 linear chargers.

Where the numbers are marginal, the honest answer is to change topology, not to add a heatsink to a SOT-223. An adjustable part such as the LM317 has the same thermal ceiling in the same package — the package, not the part number, is the limit.

For incoming inspection and counterfeit screening of regulators, see our quality and traceability process.

11. FAQ

Why does my AMS1117 get hot at only 300 mA?

Because heat depends on the voltage difference, not the current alone. From 12 V to 3.3 V, 300 mA dissipates 2.6 W — twice the package's rated 1.2 W. At 61.6 °C/W that is a 161 K rise.

Can I parallel two AMS1117s to share the current?

Not reliably. Linear regulators do not share current by design; the one with the slightly higher setpoint takes almost everything. Paralleling needs ballast resistors or a dedicated current-sharing controller, which costs more than a buck converter.

Is a small heatsink on the tab enough?

Only if the thermal path is real: a clip or adhesive with measured contact, plus airflow. A heatsink glued to plastic does nothing. Compute the new theta_JA and verify with a thermocouple rather than assuming.

Does a bigger output capacitor help the heating?

No. Capacitance affects stability and transient response, not steady-state dissipation. It can reduce peak junction temperature during load steps, but the average is set by P = (Vin − Vout) × Iout.

What should replace it for a 12 V input?

A buck converter, or a two-stage design with a 12→5 V buck followed by the LDO. If the load is under 100 mA and the enclosure is cool, the AMS1117 can stay — but verify with the derating curve first.

Can I chain two AMS1117s, 12 V to 5 V then 5 V to 3.3 V?

You can, and it works thermally: the first stage drops 7 V at 0.5 A, which is 3.5 W — still too much for SOT-223. Splitting the drop across two linear parts does not reduce the total heat, it only moves it. If you need two stages, make the first one a switcher.

12. Sources

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