MOSFET Selection: VDS, RDS(on), Qg, and Thermal

MOSFET Selection: VDS, RDS(on), Qg, and Thermal

MOSFET Selection: VDS, RDS(on), Qg, and Thermal

Most MOSFET choices fail on the second or third number, not the first. The voltage rating is easy; the on-resistance at your actual gate drive, and the heat that follows, are where designs go wrong.

Quick Answer

  1. VDS: at least 1.5–2× the maximum input voltage, including transients.
  2. RDS(on): at the gate voltage you actually apply — not the 10 V number.
  3. Qg: sets gate drive loss and switching speed; a big die has more of it.
  4. Thermal: package and copper decide whether the loss is survivable.

1. Voltage: the easy number

A 24 V rail with load transients can see 30–36 V at the drain. A 40 V FET is a reasonable start; a 30 V part is not. The rule of thumb is 1.5–2× the nominal rail, and check the avalanche rating if the load is inductive.

Higher voltage ratings usually come with higher RDS(on) for the same die size, so do not over-specify: a 100 V part on a 12 V rail costs on-resistance for margin you do not need.

Rail VDS to look for Comment
5 V 20–30 V Plenty of choice, low RDS(on)
12 V 30–40 V The common sweet spot
24 V 40–60 V Check transients on the rail
48 V 80–100 V RDS(on) rises; parallel devices may be better

2. RDS(on) at your gate voltage

RDS(on) versus gate-source voltage for logic-level and standard MOSFETs
Figure 1 — A standard FET at 3.3 V is not the part the front page describes.

Datasheets quote RDS(on) at 10 V, often also at 4.5 V, and rarely at 2.5 V. If the gate driver is a 3.3 V MCU pin, the 10 V number is fiction for your design: the part may be only partially enhanced, and the resistance several times higher.

Gate drive Part class Watch for
10–12 V Standard Gate charge and driver current
4.5–5 V Logic-level Check the 4.5 V column exists
2.5–3.3 V Sub-logic-level Fewer parts; watch threshold spread

3. Qg and the driver

Gate charge versus on-resistance trade-off
Figure 2 — Small die: low Qg and high RDS(on). Large die: the opposite. There is no free lunch.
Gate loss = Qg x Vg x fsw

Qg 30 nC, 10 V, 100 kHz: 30 mW
Qg 6 nC:                   6 mW

Gate loss is small at 100 kHz and dominant at 1 MHz. The other half is switching loss during the transition, which depends on how fast the driver can charge and discharge the gate — a weak driver with a large Qg turns a “low RDS(on)” part into a heater.

Driver strength is the other half of the equation. A 3.3 V GPIO delivers a few milliamps; a dedicated gate driver delivers amps for a few nanoseconds. With a large Qg and a weak driver, the FET spends longer in the linear region on every edge, and that time is heat.

4. The loss budget

Total loss versus load current for three MOSFET options
Figure 3 — At high current, conduction dominates and the low-RDS part wins; at low current, gate loss can decide.
Term Formula Note
Conduction I² × RDS(on) × D Use RDS(on) at temperature
Switching 0.5 × VDS × I × (tr + tf) × fsw Measured, not guessed
Gate Qg × Vg × fsw Driver loss often included
Body diode VF × I × dead time × fsw Matters in synchronous stages

Example: 24 V to 5 V, 5 A, 200 kHz, RDS(on) 10 mΩ at 100 °C, D = 0.21. Conduction is 25 × 0.010 × 0.21 ≈ 53 mW; switching with 20 ns edges is 0.5 × 24 × 5 × 40e-9 × 200e3 ≈ 480 mW; gate at 10 nC is 2 mW. Switching, not conduction, is the problem — a faster edge or a lower frequency changes the answer.

That result is the opposite of the usual intuition. At 24 V and 200 kHz the switching term dominates, so a part with slightly higher RDS(on) but much lower Qg and faster edges can run cooler. At 5 V and 50 kHz the conduction term usually wins, and the low-RDS part is correct.

5. Thermal: package and copper

Junction temperature rise versus dissipation for three package types
Figure 4 — The same die in three packages: the thermal path, not the silicon, sets the ceiling.

The drain pad is the heatsink. A DFN with a via array and copper on the other side can reach 20 °C/W; a SOT-23 without copper is closer to 200 °C/W in still air. Choosing the package is choosing the thermal resistance.

5b. Three candidates, same job

Candidate RDS(on) at 4.5 V Qg Fits
A: big die 5 mΩ 30 nC Low frequency, high current
B: balanced 10 mΩ 10 nC Most 100–300 kHz designs
C: small die 20 mΩ 3 nC High frequency, light load

None of these is “best”. The right answer depends on the loss budget, which is why the selection order starts with the application numbers rather than with the part list.

6. Selection order

MOSFET selection order: voltage, resistance, gate charge, thermal
Figure 5 — Four steps; each one filters the list before the next.
  1. Filter by VDS (1.5–2× rail, plus transients).
  2. Filter by RDS(on) at the gate voltage you will use, at 100 °C.
  3. Check Qg against the driver's capability at your switching frequency.
  4. Check the package thermal resistance against the loss budget.
  5. Then check body diode, SOA and avalanche — the details that decide the last two candidates.

7. FAQ

Is lower RDS(on) always better?

No. Lower RDS(on) usually means a larger die, more Qg and slower switching, which can increase total loss at high frequency.

Can I drive a standard MOSFET from 3.3 V?

Usually not well. The threshold may be met, but the part will not be fully enhanced, so RDS(on) is much higher than the datasheet value.

Why does the FET get hot at low current?

Switching and gate losses do not fall with current. At light load they can dominate, especially at high frequency.

Do I need a gate resistor?

A small one (2–10 Ω) tames ringing and controls EMI. Too large and the switching loss rises; too small and the ringing exceeds the gate rating.

N-channel or P-channel for high-side?

N-channel has better RDS(on), but needs a bootstrap or charge pump. P-channel is simpler and worse per area — fine for low current.

What about the body diode?

In a synchronous stage, the body diode conducts during dead time. Its forward drop and recovery charge add loss, and in a hard-switched bridge they can cause ringing. Check trr and Qrr, not just the forward voltage.

How do I read the safe operating area?

The SOA graph shows the current the part can handle for a given VDS and pulse width. It matters for hot-plug, inrush and fault conditions — not for steady-state operation.

How much copper do I need?

Enough to keep the tab near the ambient plus a few degrees at the expected loss. Thermal vias under the pad are the first step, not a heatsink.

8. Sources

  • Manufacturer MOSFET datasheets — RDS(on) at 25 °C and 100 °C, Qg, SOA, thermal resistance.
  • Application notes on MOSFET power loss and gate drive (TI, Infineon, onsemi).
  • Package thermal data — RθJA with the recommended copper area and via pattern.

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